These are pretty straight forward.

for myself

NES has 2 controller ports, and a rarely used 48 pin expansion port underneath

NES IO ports 1 output port, 3 bits, accesible by writing the bottom 3 bits of 4016

2 input ports, each is 5 bits wide. accesible by reading the bottom 5 bits of 4016 and 4017 reading these 2 ports activate pins /OE1 and /OE2

the standard NES controller dataline

Introduction

If you haven’t checked out my PPU and CPU writeups, I recommend you go check them out before reading this part, as I’m building on top of things I explained there.

Terminology

• ROM - a type of memory (which unlike RAM) its data cannot change (this is why its also called ROM - “read only memory”. as you can only read data from it). The data in it is set once by the manufacturer, and cannot be changed again by the CPU.

What is a cartridge?

Modern consoles have full operating systems, and some firmware to boot the operating system (like BIOS or UEFI). The NES doesn’t have any of that - it uses cartridges. These are essentially just memory chips (usually ROM, but sometimes RAM) which contains the data of the game. The cartridge is made up of (in order):

Terminology

• DMA - a component in a computer system which can access the system RAM, and other storage areas directly and move data between them without needing the CPU. As always, if you want to understand better, go look it up online

OAM

The OAM (object attribute memory) is the place where sprites are stored. It has the size of 256 bytes, and can store 64 sprites. Using a short calculation, we get that each sprite entry is the size of 256/64 = 4 Bytes.

Prologue

If you haven’t read the CPU writeup yet I highly recommend you go check that writeup first, as I’m building on top of stuff presented there. You can check it out here

When I started learning how the NES PPU works, one of the things that were very difficult for me was that my mindset was that things are done in the simplest most elegant and logical way. If you think the same, please yeet that mindset into a garbage can, because that’s not the case here!

Introduction

The NES has a slightly modified version of the MOS 6502 CPU. This CPU was quite popular back in the day so there is plenty of detailed documentation about it online.

Terminology

We won’t be using any fancy emulation/NES terminology here, just basic computer stuff. I will explain some terms very simply, if you want a more in depth explanation you can look these things up online.

• Registers - small and fast areas of storage the CPU can fetch data from and write data to.

Prologue

There are many posts out there explaning this mechanism, and while they are good, most of them focus on the exploitation part of the PLT and GOT and thus don’t explain glibc’s role in the process My goal here isn’t to explain the whole implementation of this mechanism in glibc, but rather provide key insights and direction to give a detailed yet overally complicated understanding of the process.

Any assembly here will be x86_64 AT&T syntax, but it’s the same gist for different architectures as well.

Disclaimer:

1. The targeted audience of this document is dynamic linker & loader implementors, so important information for other tools (such as linkers and compilers) might be missing.

2. This writeup is DEFINITELY not a substitute for the original document. It is highly recommended to read the original document before reading this summary. I wrote it to help me understand the document better, and to be able to reference things quickly if I forget something. It would be very hard to understand this mechanism without reading the original document first.